The invention relates to a method to enhance grain size in polycrystalline silicon, called polysilicon. Larger grain size in polysilicon is advantageous for many uses, particularly in thin film transistors (TFTs).
One of the major obstacles to the use of polysilicon thin film as a semiconductor in active devices is the relatively small grain sizes (around 0.05 micron or less) of polysilicon thin films deposited by such methods as low-pressure chemical vapor deposition and sputtering. A film with small grain size has a larger number of grain boundaries, decreasing carrier mobility. Typical electron mobilities in polysilicon films made using these methods are on the order of 10 cm2/volt-second, two orders of magnitude lower than electron mobilities in bulk silicon.
The poor electrical performance caused by grain boundaries in the channel region limits the use of TFTs largely to low-temperature flat panel displays. It is believed that electrical properties of TFTs can be improved if the grain size is enhanced and the number of grain boundaries in the channel region minimized.
There is a need, therefore, to enhance grain size in polysilicon thin films.